Quantum Leap offers a large portfolio of silicon proven digital and analog IP supported by over 400 designers with years of experience.
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RISC-V UltraSOC is a RISC-V Gold Member RISC-V is an open, free ISA enabling a new era of processor innovation through open standard collaboration. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. RISC-V Foundation |
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Suite of IP for silicon debug, performance monitoring, optimization and analytics. It is non-intrusive, and runs at wire speed. UltraSOCs portfolio IP supports all major CPUs including ARM, MIPS, Tensilica, CEVA and ARC, protocol-aware probes for buses, memory interfaces and custom logic monitors. Significantly reduces silicon bring-up and debug time and reduces time to market. www.ultrasoc.com | ||
| S3 GROUP Click here for the S3 Group IP selector guide | |||
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Portfolio of 260+ RF and mixed signal IP cores | ||
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High end performance IP · ADC - energy efficiency typically targeting < 0.05pJ (energy efficiency) · DAC - high linearity, wide-BW, SFDR typically better than 78dBc. · PLL- low jitter, typically targeting < 1ps (rms long-term jitter) · Power Management – converters, LDOs, temp sensors (95% n) |
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IP subsystems · AFE & ABB for Cellular, WLAN, ISM & Satellite comms · Customizable PMIC for multi-core processor applications. |
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Ready to customize to specific design requirements | ||
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Proven team that have delivered on 100’s of projects | ||
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30 year successful track record | ||
| FLEX LOGIX has developed reconfigurable RTL IP cores and software for you to make superior, successful SoCs. We have proven our architecture in silicon.
Flex Logix provides: |
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Physical design and logic design files for the array size you want, in the process you want: GDS, LIB, LEF, Verilog; | ||
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Training and assistance in architecture, integration, test, and whatever else is needed to win; | ||
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EFLX Compiler for resource estimation, timing analysis and bitstream generation. | ||
| SILICON CREATIONS Leading provider of PLLs, SerDes interfaces, Oscillators and LVDS IO. Also support automotive ASIL requirements | |||
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Ring & LC PLLs - 180nm to 7nm silicon proven | ||
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SerDes - up to 12.7Gb/ | ||
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LVDS IO | ||
| OMNIPHY | |||
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10/100 and 10/100/1000 Ethernet PHY |
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100 Base T1 Automotive Ethernet | ||
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10G-KR, 25/28G SERDES | ||
| NORTHWEST LOGIC | |||
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PCIe gen 4, 3, 2.1, 1.1 – x1, x2, x4, x8, x16 configurations | ||
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DMA cores – Memory Controllers | ||
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HBM | ||
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DDR4/3 /2 /1 – SD | ||
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LPDDR4/3/2/1 – SDRAM | ||
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RLDRAM3/II – MRA | ||
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MIPI CSI, DSI controllers | ||
| CORIGINE | |||
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USB3.1 type C - Superspeed and Superspeed+ controllers | ||
| COMCORES Communication IP | |||
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CPRI 7.0 / 6.1 | ||
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| UNIQUIFY DDR IP | |||
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Patented self aligning technology to boost performance and improve yield / reliability on DDR interfaces. Complete DDR subsytem including controller, PHY and IO. Smallest area and lowest power implementation. Silicon proven on TSMC, GF, Samsung, SMIC, and UMC. | ||
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